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  irf4905pbf hexfet ? power mosfet pd - 94816 fifth generation hexfets from international rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. this benefit, combined with the fast switching speed and ruggedized device design that hexfet power mosfets are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. the to-220 package is universally preferred for all commercial-industrial applications at power dissipation levels to approximately 50 watts. the low thermal resistance and low package cost of the to- 220 contribute to its wide acceptance throughout the industry. parameter max. units i d @ t c = 25c continuous drain current, v gs @ -10v -74 i d @ t c = 100c continuous drain current, v gs @ -10v -52 a i dm pulsed drain current  -260 p d @t c = 25c power dissipation 200 w linear derating factor 1.3 w/c v gs gate-to-source voltage 20 v e as single pulse avalanche energy  930 mj i ar avalanche current  -38 a e ar repetitive avalanche energy  20 mj dv/dt peak diode recovery dv/dt  -5.0 v/ns t j operating junction and -55 to + 175 t stg storage temperature range soldering temperature, for 10 seconds 300 (1.6mm from case ) c mounting torque, 6-32 or m3 screw 10 lbf?in (1.1n?m) absolute maximum ratings parameter typ. max. units r jc junction-to-case ??? 0.75 r cs case-to-sink, flat, greased surface 0.50 ??? c/w r ja junction-to-ambient ??? 62 thermal resistance v dss = -55v r ds(on) = 0.02 ? i d = -74a t o -22 0 ab  advanced process technology  ultra low on-resistance  dynamic dv/dt rating  175c operating temperature  fast switching  p-channel  fully avalanche rated  lead-free description 11/6/03 s d g
irf4905pbf parameter min. typ. max. units conditions i s continuous source current mosfet symbol (body diode) ??? ??? showing the i sm pulsed source current integral reverse (body diode)  ??? ??? p-n junction diode. v sd diode forward voltage ??? ??? -1.6 v t j = 25c, i s = -38a, v gs = 0v  t rr reverse recovery time ??? 89 130 ns t j = 25c, i f = -38a q rr reverse recovery charge ??? 230 350 nc di/dt = -100a/s  t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by l s +l d ) parameter min. typ. max. units conditions v (br)dss drain-to-source breakdown voltage -55 ??? ??? v v gs = 0v, i d = -250a ? v (br)dss / ? t j breakdown voltage temp. coefficient ??? -0.05 ??? v/c reference to 25c, i d = -1ma r ds(on) static drain-to-source on-resistance ??? ??? 0.02 ? v gs = -10v, i d = -38a  v gs(th) gate threshold voltage -2.0 ??? -4.0 v v ds = v gs , i d = -250a g fs forward transconductance 21 ??? ??? s v ds = -25v, i d = -38a ??? ??? -25 a v ds = -55v, v gs = 0v ??? ??? -250 v ds = -44v, v gs = 0v, t j = 150c gate-to-source forward leakage ??? ??? 100 v gs = 20v gate-to-source reverse leakage ??? ??? -100 na v gs = -20v q g total gate charge ??? ??? 180 i d = -38a q gs gate-to-source charge ??? ??? 32 nc v ds = -44v q gd gate-to-drain ("miller") charge ??? ??? 86 v gs = -10v, see fig. 6 and 13  t d(on) turn-on delay time ??? 18 ??? v dd = -28v t r rise time ??? 99 ??? i d = -38a t d(off) turn-off delay time ??? 61 ??? r g = 2.5 ? t f fall time ??? 96 ??? r d = 0.72 ?, see fig. 10  between lead, ??? ??? 6mm (0.25in.) from package and center of die contact c iss input capacitance ??? 3400 ??? v gs = 0v c oss output capacitance ??? 1400 ??? pf v ds = -25v c rss reverse transfer capacitance ??? 640 ??? ? = 1.0mhz, see fig. 5 nh electrical characteristics @ t j = 25c (unless otherwise specified) l d internal drain inductance l s internal source inductance ??? ??? i gss ns 4.5 7.5 i dss drain-to-source leakage current  repetitive rating; pulse width limited by max. junction temperature. ( see fig. 11 )  i sd -38a, di/dt -270a/s, v dd v (br)dss , t j 175c notes:  starting t j = 25c, l = 1.3mh r g = 25 ? , i as = -38a. (see figure 12)  pulse width 300s; duty cycle 2%. s d g source-drain ratings and characteristics a s d g -74 -260
irf4905pbf fig 4. normalized on-resistance vs. temperature fig 1. typical output characteristics fig 3. typical transfer characteristics 1 10 100 1000 0.1 1 10 100 d ds 20s pulse width t = 25c c a -i , drain-to-source current (a) -v , drain-to-source voltage (v) vgs top - 15v - 10v - 8.0v - 7.0v - 6.0v - 5.5v - 5.0v bottom - 4.5v -4.5v 1 10 100 1000 0.1 1 10 100 d ds a -i , drain-to-source current (a) -v , drain-to-source voltage (v) vgs top - 15v - 10v - 8.0v - 7.0v - 6.0v - 5.5v - 5.0v bottom - 4.5v -4.5v 20s pulse width t = 175c c 1 10 100 1000 45678910 t = 25c j gs d a -i , drain-to-source current (a) -v , gate-to-source voltage (v) v = -25v 20s pulse width ds t = 175c j 0.0 0.5 1.0 1.5 2.0 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 j t , junction temperature (c) r , drain-to-source on resistance ds(on) (normalized) a v = -10v gs i = -64a d fig 2. typical output characteristics
irf4905pbf fig 8. maximum safe operating area fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 7. typical source-drain diode forward voltage 0 1000 2000 3000 4000 5000 6000 7000 1 10 100 c, capacitance (pf) a ds -v , drain-to-source voltage (v) v = 0v, f = 1mhz c = c + c , c shorted c = c c = c + c gs iss gs gd ds rss gd oss ds gd c iss c oss c rss 0 4 8 12 16 20 0 40 80 120 160 200 g gs a -v , gate-to-source voltage (v) q , total gate charge (nc) for test circuit see figure 13 i = -38a v = -44v v = -28v d ds ds 1 10 100 1000 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 t = 25c j v = 0v gs sd sd a -i , reverse drain current (a) -v , source-to-drain voltage (v) t = 175c j 1 10 100 1000 1 10 100 operation in this area limited by r ds(on) 10ms a -i , drain current (a) -v , drain-to-source voltage (v) ds d 100s 1ms t = 25c t = 175c single pulse c j
irf4905pbf fig 10a. switching time test circuit fig 10b. switching time waveforms fig 11. maximum effective transient thermal impedance, junction-to-case fig 9. maximum drain current vs. case temperature v ds -10v pulse width 1 s duty factor 0.1 % r d v gs v dd r g d.u.t. + - v ds 90% 10% v gs t d(on) t r t d(off) t f 25 50 75 100 125 150 175 0 20 40 60 80 t , case temperature ( c) i , drain current (a) c d 0.01 0.1 1 0.00001 0.0001 0.001 0.01 0.1 1 notes: 1. duty factor d = t / t 2. peak t = p x z + t 1 2 j dm thjc c p t t dm 1 2 t , rectangular pulse duration (sec) thermal response (z ) 1 thjc 0.01 0.02 0.05 0.10 0.20 d = 0.50 single pulse (thermal response)
irf4905pbf fig 13b. gate charge test circuit fig 13a. basic gate charge waveform fig 12c. maximum avalanche energy vs. drain current q g q gs q gd v g charge -10v d.u.t. v ds i d i g -3ma v gs .3 f 50k ? .2 f 12v current regulator same type as d.u.t. current sampling resistors + - fig 12b. unclamped inductive waveforms fig 12a. unclamped inductive test circuit t p v ( br ) dss i as r g i as 0.01 ? t p d.u.t l v ds v dd driver a 15v -20v 0 500 1000 1500 2000 2500 25 50 75 100 125 150 175 j e , single pulse avalanche energy (mj) as a starting t , junction temperature (c) i top -16a -27a bottom -38a d
irf4905pbf peak diode recovery dv/dt test circuit p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-applied voltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period + - + + + - - -    r g v dd ? dv/dt controlled by r g ? i sd controlled by duty factor "d" ? d.u.t. - device under test d.u.t * circuit layout considerations ? low stray inductance ? ground plane ? low leakage inductance current transformer  * reverse polarity of d.u.t for p-channel v gs [ ] [ ] *** v gs = 5.0v for logic level and 3v drive devices [ ] *** fig 14. for p-channel hexfets
irf4905pbf lead assignments 1 - gate 2 - drain 3 - source 4 - drain - b - 1.32 (.052) 1.22 (.048) 3x 0.55 (.022) 0.46 (.018) 2.92 (.115) 2.64 (.104) 4.69 (.185) 4.20 (.165) 3x 0.93 (.037) 0.69 (.027) 4.06 (.160) 3.55 (.140) 1.15 (.045) min 6.47 (.255) 6.10 (.240) 3.78 (.149) 3.54 (.139) - a - 10.54 (.415) 10.29 (.405) 2.87 (.113) 2.62 (.103) 15.24 (.600) 14.84 (.584) 14.09 (.555) 13.47 (.530) 3x 1.40 (.055) 1.15 (.045) 2.54 (.100) 2x 0.36 (.014) m b a m 4 1 2 3 notes: 1 dimensioning & tolerancing per ansi y14.5m, 1982. 3 outline conforms to jedec outline to-220ab. 2 controlling dimension : inch 4 heatsink & lead measurements do n ot include burrs. hexfet 1- gate 2- drain 3- source 4- drain lead assignments igbts, copack 1- gate 2- collector 3- emitter 4- collector to-220ab package outline dimensions are shown in millimeters (inches) to-220ab part marking information example: in the assembly line "c" this is an irf1010 lot code 1789 assembled o n ww 19, 1997 part number assembly lot code date code year 7 = 1997 line c week 19 logo rectifier internation al note: "p" in assembly line position indicates "lead-free" data and specifications subject to change without notice. ir world headquarters: 233 kansas st., el segundo, california 90245, usa tel: (310) 252-7105 tac fax: (310) 252-7903 visit us at www.irf.com for sales contact information . 11/03
note: for the most current drawings please refer to the ir website at: http://www.irf.com/package/


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